Alibaba unveils its Zhenwu V900 chip and Qwen 4 plans

At its Apsara Conference in Hangzhou, Alibaba’s chip subsidiary T-Head unveiled the Zhenwu V900, an AI accelerator it said carries 216GB of memory and 1,200GB/s of inter-chip bandwidth, and delivers roughly three times the performance of its predecessor, the Zhenwu M890. T-Head said more than 1,000 V900 chips can operate as a single system, and that clusters built with Alibaba’s networking architecture can scale to as many as 500,000 accelerators; mass production is planned for the first quarter of 2027. As with comparable claims from other Chinese chipmakers, the figures are as stated at the keynote and reported by trade press rather than independently benchmarked.

Separately at the same event, Qwen project lead Liu Dayiheng said Alibaba’s next major model family, Qwen 4, is in training on a new architecture and will ship in four tiers — Max, Plus and Flash, plus an open-weight 27-billion-parameter model for local deployment — with no release date, pricing or benchmark scores yet given. He said the following generations, Qwen 4.5 and Qwen 5, are being targeted at 5 to 10 trillion parameters. Alibaba also used the conference to unveil a “Qwen Book” agentic-computer line and AI wearables, including smart glasses and earbuds co-engineered with Bose, intended to give Qwen-based agents access to a user’s daily and workplace context; pre-orders opened the same week.

The keynote positioned Alibaba’s chip and model roadmaps as parallel bets, alongside Huawei’s own accelerated accelerator roadmap announced days earlier, on building AI infrastructure less dependent on Nvidia hardware and on scaling models well past current parameter counts, though both remain unreleased or unproven at the scale claimed.