Timeline

Huawei unveils the Ascend 960 and accelerates its roadmap

Huawei said a 4,096-card cluster using near-package optical links delivers roughly 8 exaflops of FP8 compute, and moved a follow-on chip's launch forward by three quarters.

  • Compute & infrastructure
  • Notable

At its Huawei Connect 2026 conference in Shanghai, Huawei unveiled the Ascend 960 chip series and, in a published keynote, pulled its own roadmap forward. The company said a variant, the Ascend 960DT, would ship in the first quarter of 2027 — three quarters earlier than the timeline it had published only days before — with a second variant, the Ascend 960PR, following in the third quarter of 2027, one quarter ahead of its original schedule. It set out a following annual cadence, with an Ascend 970 chip planned for 2028 and an Ascend 980 for 2029.

Per the keynote, the centrepiece was an “Atlas 960E SuperPoD” cluster connecting 4,096 Ascend 960 NPUs, said to deliver 8 exaflops of FP8 compute and a petabyte of HBM capacity. Huawei attributed the cluster’s density to near-package optical interconnect — a system it calls Hi-ONE, paired with its existing UnifiedBus links — which it said replaces roughly 48,000 conventional 800G optical modules with about 5,500 Hi-ONE units, cutting power draw by more than 550 kilowatts and raising system availability to 99.8%.

The announcement continues Huawei’s push to supply AI chips domestically as US export controls keep Nvidia’s most capable accelerators out of the Chinese market, or restrict them to cut-down variants. Huawei has not published independently verified figures for the cluster’s real-world training throughput, and the specifications above are as claimed at the keynote and reported by trade press rather than confirmed by outside benchmarking. Estimates of how much of China’s AI-chip market Huawei and Nvidia each hold vary widely by analyst and were not independently confirmable for this entry.

The accelerated timeline signals that Huawei sees a narrowing window to establish its chips and interconnect architecture as the default for large Chinese AI training clusters before global capacity — including US firms’ own China-compliant products — catches up.

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